1. Field of the Invention
The present invention relates to a method for analyzing numerous test data. More particularly, the present invention relates to a data analysis method for analyzing the test results of an integrated circuit (IC) process or a semiconductor process.
2. Description of the Related Art
With the rapid development of the IC industry, the market of electronic devices grows quickly. Most electronic elements like semiconductor chips and photoelectric devices (e.g., LED, LCD panel or PDP) are made with many steps and are similar in that their products are manufactured lot by lot with various quality tests performed through the whole process to monitor the product yield.
To adjust related machine parameters and correct deviations in an IC process, many in-line quality tests are conducted during the IC process. After the IC process is finished, various product tests are conducted. The products that pass certain product tests and thus satisfy the quality requirements of the client are called qualified products, of which the percentage among all products is defined as the product yield.
When the yield of an IC process is still low, identifying the major yield killer of the IC process is relatively easy. After the yield is raised to a certain level like 80%, however, the correlations of different test results with respect to the yield are close to each other, and large noises are present in the test data greatly increasing the possibility of mis-interpretation. Hence, it is quite difficult to identify a major yield killer, so that the identification takes much time and labor while the yield is not surely improved.